adcs

Add with Carry and Set Flags

ADCS <Wd>, <Wn>, <Wm>

Adds two register values and Carry, updating NZCV flags.

Pseudocode Operation

result ← Wn + Wm + C
Wd ← result[0:31]
N ← result[31]
Z ← (result[0:31] == 0)
C ← result[32] (unsigned overflow)
V ← (overflow from signed addition)

Example

ADCS w0, w1, w2

Encoding

Binary Layout
0
31
0
30
1
29
11010000
28:21
Rm
20:16
000000
15:10
Rn
9:5
Rd
4:0
 
Format Data Processing (3-source)
Opcode 0x3A000000
Extension Base

Operands

  • Wd
    Destination 32-bit integer register
  • Wn
    First source / base 32-bit integer register
  • Wm
    Second source / offset 32-bit integer register

Related

Other forms of adcs

  • adcs Add with Carry and Set Flags (64-bit)

Across architectures

Add With Carry : how x86, ARM, RISC-V, and PowerISA each do this.

More in Base

Reference

Instruction Forms

Encoding Instruction ISA Bit pattern
0x3A000000 ADCS <Wd>, <Wn>, <Wm> A64 0 | 0 | 1 | 11010000 | Rm | 000000 | Rn | Rd
0xBA000000 ADCS <Xd>, <Xn>, <Xm> A64 1 | 0 | 1 | 11010000 | Rm | 000000 | Rn | Rd

Description

Add with Carry, setting flags, adds two register values and the Carry flag value, and writes the result to the destination register. It updates the condition flags based on the result.

Operation

bits(datasize) result;
bits(datasize) operand1 = X[n, datasize];
bits(datasize) operand2 = X[m, datasize];
bits(4) nzcv;

(result, nzcv) = AddWithCarry(operand1, operand2, PSTATE.C);

PSTATE.<N,Z,C,V> = nzcv;

X[d, datasize] = result;