adcs
Add with Carry and Set Flags (64-bit)
ADCS <Xd>, <Xn>, <Xm>
Adds two 64-bit register values and Carry, updating NZCV flags.
Details
Add with Carry and Set Flags adds two 64-bit register values and the Carry flag, updating the NZCV condition flags based on the result. The N flag reflects the sign of the result, Z is set if the result is zero, C is set on unsigned carry, and V is set on signed overflow. This instruction is AArch64-only and executes at any privilege level.
Pseudocode Operation
result ← Xn + Xm + C
Xd ← result
N ← result[63]
Z ← (result == 0)
C ← UnsignedOverflow(Xn, Xm, C)
V ← SignedOverflow(Xn, Xm, C)
Example
ADCS x0, x1, x2
Encoding
Binary Layout
1
0
1
11010000
Rm
000000
Rn
Rd
Operands
-
Xd
Destination 64-bit integer register -
Xn
First source / base 64-bit integer register -
Xm
Second source / offset 64-bit integer register
Reference (Arm A64 ISA)
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0x3A000000 | ADCS <Wd>, <Wn>, <Wm> | A64 | 0 | 0 | 1 | 11010000 | Rm | 000000 | Rn | Rd | ||
| 0xBA000000 | ADCS <Xd>, <Xn>, <Xm> | A64 | 1 | 0 | 1 | 11010000 | Rm | 000000 | Rn | Rd |
Description
Add with Carry, setting flags, adds two register values and the Carry flag value, and writes the result to the destination register. It updates the condition flags based on the result.
Operation
bits(datasize) result; bits(datasize) operand1 = X[n, datasize]; bits(datasize) operand2 = X[m, datasize]; bits(4) nzcv; (result, nzcv) = AddWithCarry(operand1, operand2, PSTATE.C); PSTATE.<N,Z,C,V> = nzcv; X[d, datasize] = result;