csel

Conditional Select

CSEL <Wd>, <Wn>, <Wm>, <cond>

Selects between two registers based on condition.

Pseudocode Operation

if ConditionHolds(cond) then
  Wd ← Wn
else
  Wd ← Wm

Example

CSEL w0, w1, w2, cond

Encoding

Binary Layout

0

31

0

30

0

29

11010100

28:21

Rm

20:16

cond

15:12

0

11

0

10

Rn

9:5

Rd

4:0

 

Format Cond Select

Opcode 0x1A800000

Extension Base

Operands

• Wd
  Destination 32-bit integer register
• Wn
  True Src
• Wm
  False Src
• cond
  Condition

Related

Across architectures

Conditional Select (Branchless Move) : how x86, ARM, RISC-V, and PowerISA each do this.

More in Base

Reference

View in Arm A64 ISA Reference ↗ Arm A64 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0x1A800000	CSEL <Wd>, <Wn>, <Wm>, <cond>		A64		0 | 0 | 0 | 11010100 | Rm | cond | 0 | 0 | Rn | Rd
0x9A800000	CSEL <Xd>, <Xn>, <Xm>, <cond>		A64		1 | 0 | 0 | 11010100 | Rm | cond | 0 | 0 | Rn | Rd

Description

If the condition is true, Conditional Select writes the value of the first source register to the destination register. If the condition is false, it writes the value of the second source register to the destination register.

Operation

bits(datasize) result;
if ConditionHolds(cond) then
    result = X[n, datasize];
else
    result = X[m, datasize];

X[d, datasize] = result;