cmn
Compare Negative (A32)
CMN<c> <Rn>, <Rm> {, <shift>}
Adds two values and updates flags (discarding result). Same as ADDS with no destination.
Pseudocode Operation
if ConditionPassed() then
(result, carry, overflow) ← AddWithCarry(Rn, shifted_Rm, '0')
N ← result[31]
Z ← (result == 0)
C ← carry
V ← overflow
Example
CMN r1, r2
Encoding
Binary Layout
cond
31:28
00010
27:23
11
22:21
1
20
Rn
19:16
0
15
0
14
0
13
0
12
imm5
11:7
stype
6:5
0
4
Rm
3:0
Operands
-
Rn
First source / base general-purpose register -
Rm
Second source / offset general-purpose register
Reference
View in Arm A64 ISA Reference ↗
Arm AArch32 ISA
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0x03700000 | CMN{<c>}{<q>} <Rn>, #<const> | A32 | cond | 00110 | 11 | 1 | Rn | 0 | 0 | 0 | 0 | imm12 | ||
| 0xF1100F00 | CMN{<c>}{<q>} <Rn>, #<const> | T32 | 11110 | i | 0 | 1000 | 1 | Rn | 0 | imm3 | 1111 | imm8 | ||
| 0x01700060 | CMN{<c>}{<q>} <Rn>, <Rm>, RRX | A32 | cond | 00010 | 11 | 1 | Rn | 0 | 0 | 0 | 0 | 00000 | 11 | 0 | Rm | ||
| 0x01700000 | CMN{<c>}{<q>} <Rn>, <Rm> {, <shift> #<amount>} | A32 | cond | 00010 | 11 | 1 | Rn | 0 | 0 | 0 | 0 | imm5 | stype | 0 | Rm | ||
| 0x42C0 | CMN{<c>}{<q>} <Rn>, <Rm> | T32 | 010000 | 1011 | Rm | Rn | ||
| 0xEB100F30 | CMN{<c>}{<q>} <Rn>, <Rm>, RRX | T32 | 1110101 | 1000 | 1 | Rn | 0 | 000 | 1111 | 00 | 11 | Rm | ||
| 0xEB100F00 | CMN{<c>}.W <Rn>, <Rm> | T32 | 1110101 | 1000 | 1 | Rn | 0 | imm3 | 1111 | imm2 | stype | Rm | ||
| 0x01700010 | CMN{<c>}{<q>} <Rn>, <Rm>, <type> <Rs> | A32 | cond | 00010 | 11 | 1 | Rn | 0 | 0 | 0 | 0 | Rs | 0 | stype | 1 | Rm |
Description
Compare Negative (register) adds a register value and an optionally-shifted register value. It updates the condition flags based on the result, and discards the result.
Operation
if ConditionPassed() then
EncodingSpecificOperations();
shifted = Shift(R[m], shift_t, shift_n, PSTATE.C);
(result, nzcv) = AddWithCarry(R[n], shifted, '0');
PSTATE.<N,Z,C,V> = nzcv;