clz

Count Leading Zeros (A32)

CLZ<c> <Rd>, <Rm>

Counts the number of consecutive zeros from MSB.

Pseudocode Operation

if Rm == 0 then
  Rd ← 32
else
  count ← 0
  for i from 31 down to 0
    if Rm[i] == 1 then
      break
    count ← count + 1
  Rd ← count
condition_flags unchanged

Example

CLZ r0, r2

Encoding

Binary Layout

cond

31:28

00010110

27:20

1

19

1

18

1

17

1

16

Rd

15:12

1

11

1

10

1

9

1

8

0001

7:4

Rm

3:0

 

Format Data Proc

Opcode 0x016F0F10

Extension A32 (Base)

Operands

• Rd
  Destination general-purpose register
• Rm
  Second source / offset general-purpose register

Related

Other forms of clz

• clz Count Leading Zeros
• clz Count Leading Zeros (Thumb)
• clz Vector Count Leading Zeros

Across architectures

Count Leading Zeros : how x86, ARM, RISC-V, and PowerISA each do this.

More in A32 (Base)

Reference

View in Arm A64 ISA Reference ↗ Arm AArch32 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0x016F0F10	CLZ{<c>}{<q>} <Rd>, <Rm>		A32		cond | 00010110 | 1 | 1 | 1 | 1 | Rd | 1 | 1 | 1 | 1 | 0001 | Rm
0xFAB0F080	CLZ{<c>}{<q>} <Rd>, <Rm>		T32		111110101 | 011 | Rn | 1111 | Rd | 10 | 00 | Rm

Description

Count Leading Zeros returns the number of binary zero bits before the first binary one bit in a value.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();
    result = CountLeadingZeroBits(R[m]);
    R[d] = result<31:0>;