clz

CLZ <Zd>.<T>, <Pg>/M, <Zn>.<T>

Count Leading Zeros.

Pseudocode Operation

No pseudocode available.

Encoding

Binary Layout

00000100

31:24

size

23:22

011

21:19

18:17

101

15:13

12:10

9:5

4:0

Format SVE

Opcode 0x0419A000

Extension SVE

Other forms of clz

clz Count Leading Zeros, Base
clz Count Leading Zeros (Thumb), A32 (Base)
clz Count Leading Zeros (A32), A32 (Base)
clz Vector Count Leading Zeros, NEON (SIMD)

Across architectures

Count Leading Zeros : how x86, ARM, RISC-V, and PowerISA each do this.

Reference

View in Arm A64 ISA Reference ↗ Arm A64 ISA

Instruction Forms

Encoding	Instruction	ISA	Bit pattern
0x2E204800	CLZ <Vd>.<T>, <Vn>.<T>	A64	0 \| Q \| 1 \| 01110 \| size \| 10000 \| 00100 \| 10 \| Rn \| Rd
0x5AC01000	CLZ <Wd>, <Wn>	A64	0 \| 1 \| 0 \| 11010110 \| 00000 \| 00010 \| 0 \| Rn \| Rd
0xDAC01000	CLZ <Xd>, <Xn>	A64	1 \| 1 \| 0 \| 11010110 \| 00000 \| 00010 \| 0 \| Rn \| Rd
0x0419A000	CLZ <Zd>.<T>, <Pg>/M, <Zn>.<T>	A64	00000100 \| size \| 011 \| 00 \| 1 \| 101 \| Pg \| Zn \| Zd

Description

Count the number of consecutive binary zero bits, starting from the most significant bit in each active element of the source vector, and place the results in the corresponding elements of the destination vector. Inactive elements in the destination vector register remain unmodified.

Operation

CheckSVEEnabled();
constant integer VL = CurrentVL;
constant integer PL = VL DIV 8;
constant integer elements = VL DIV esize;
bits(PL) mask = P[g, PL];
bits(VL) operand = if AnyActiveElement(mask, esize) then Z[n, VL] else Zeros(VL);
bits(VL) result = Z[d, VL];

for e = 0 to elements-1
    if ActivePredicateElement(mask, e, esize) then
        bits(esize) element = Elem[operand, e, esize];
        Elem[result, e, esize] = CountLeadingZeroBits(element)<esize-1:0>;

Z[d, VL] = result;

clz