brka

SVE Break After First True

BRKA <Pd>.B, <Pg>/Z, <Pn>.B

Sets predicates up to and including the first active element.

Details

SVE break-after instruction that creates a new predicate containing all bits from the first active bit (inclusive) up to and including the first false bit in the input predicate, under control of the governing predicate. The destination predicate contains a contiguous sequence of true bits starting from the first true bit in the source. Sets the Z flag if no active bits are found in the input. This is useful for creating masks that break execution at the first false element.

Pseudocode Operation

first_true ← -1
for i = 0 to VL-1:
  if Pg[i] ∧ Pn[i] then
    first_true ← i
    break
if first_true ≥ 0 then
  Pd ← 0
  for i = first_true to VL-1:
    if Pg[i] then
      Pd[i] ← 1
      if ¬Pn[i] then
        break
  Z ← 0
else
  Pd ← 0
  Z ← 1

Example

BRKA p0.B, p0/m/Z, p1.B

Encoding

Binary Layout
00100101
0
0
01000001
Pg
0
Pn
M
Pd
 
Format SVE Predicate
Opcode 0x25104000
Extension SVE

Operands

  • Pd
    Destination predicate register (SVE)
  • Pg
    Limit
  • Pn
    First source predicate register (SVE)

Reference (Arm A64 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x25104000 BRKA <Pd>.B, <Pg>/<ZM>, <Pn>.B A64 00100101 | 0 | 0 | 01000001 | Pg | 0 | Pn | M | Pd

Description

Sets destination predicate elements up to and including the first active and true source element to true, then sets subsequent elements to false. Inactive elements in the destination predicate register remain unmodified or are set to zero, depending on whether merging or zeroing predication is selected. Does not set the condition flags.

Operation

CheckSVEEnabled();
constant integer VL = CurrentVL;
constant integer PL = VL DIV 8;
constant integer elements = VL DIV esize;
bits(PL) mask = P[g, PL];
bits(PL) operand  = P[n, PL];
bits(PL) operand2 = P[d, PL];
boolean break = FALSE;
bits(PL) result;
constant integer psize = esize DIV 8;

for e = 0 to elements-1
    boolean element = ActivePredicateElement(operand, e, esize);
    if ActivePredicateElement(mask, e, esize) then
        bit pbit = if !break then '1' else '0';
        Elem[result, e, psize] = ZeroExtend(pbit, psize);
        break = break || element;
    elsif merging then
        bit pbit = PredicateElement(operand2, e, esize);
        Elem[result, e, psize] = ZeroExtend(pbit, psize);
    else
        Elem[result, e, psize] = ZeroExtend('0', psize);

if setflags then
    PSTATE.<N,Z,C,V> = PredTest(mask, result, esize);
P[d, PL] = result;