smlabb

Signed Multiply Accumulate (Bottom x Bottom)

SMLABB<c> <Rd>, <Rn>, <Rm>, <Ra>

Accumulates (Rn.B * Rm.B) into Ra.

Details

Signed multiply-accumulate of the bottom 16-bit halfwords of Rn and Rm, with the 32-bit product added to Ra and stored in Rd. This is an A32 DSP instruction that operates on 16-bit subregisters. The Q flag may be set if overflow occurs during accumulation, but N, Z, C, V flags are unchanged.

Pseudocode Operation

temp ← SignExtend(Rn[15:0], 32) * SignExtend(Rm[15:0], 32);
result ← temp + Ra;
if OverflowFrom_Addition(temp, Ra) then Q ← 1; end if;
Rd ← result;

Example

SMLABB r0, r1, r2, r5

Encoding

Binary Layout
cond
00010
00
0
Rd
Ra
Rm
1
0
0
0
Rn
 
Format Multiply
Opcode 0x01000080
Extension A32 (DSP)

Operands

  • Rd
    Destination general-purpose register
  • Rn
    First source / base general-purpose register
  • Rm
    Second source / offset general-purpose register
  • Ra
    Acc

Reference (Arm AArch32 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x01000080 SMLABB{<c>}{<q>} <Rd>, <Rn>, <Rm>, <Ra> A32 cond | 00010 | 00 | 0 | Rd | Ra | Rm | 1 | 0 | 0 | 0 | Rn
0xFB100000 SMLABB{<c>}{<q>} <Rd>, <Rn>, <Rm>, <Ra> T32 111110110 | 001 | Rn | Ra | Rd | 00 | 0 | 0 | Rm

Description

Signed Multiply Accumulate (halfwords) performs a signed multiply accumulate operation. The multiply acts on two signed 16-bit quantities, taken from either the bottom or the top half of their respective source registers. The other halves of these source registers are ignored. The 32-bit product is added to a 32-bit accumulate value and the result is written to the destination register. If overflow occurs during the addition of the accumulate value, the instruction sets PSTATE.Q to 1. It is not possible for overflow to occur during the multiplication.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();
    operand1 = if n_high then R[n]<31:16> else R[n]<15:0>;
    operand2 = if m_high then R[m]<31:16> else R[m]<15:0>;
    result = SInt(operand1) * SInt(operand2) + SInt(R[a]);
    R[d] = result<31:0>;
    if result != SInt(result<31:0>) then  // Signed overflow
        PSTATE.Q = '1';