smsubl

Signed Multiply-Subtract Long

SMSUBL <Xd>, <Wn>, <Wm>, <Xa>

Calculates (Xa - (Wn * Wm)) (64-bit result).

Details

Multiplies the signed 32-bit values in Wn and Wm to produce a 64-bit result, then subtracts this product from the 64-bit value in Xa and places the 64-bit difference in Xd. This is used for wider multiply-subtract operations. No condition flags are affected. This instruction is AArch64-only.

Pseudocode Operation

product ← SignExtend(Wn, 64) * SignExtend(Wm, 64)
Xd ← Xa - product
N ← unchanged
Z ← unchanged
C ← unchanged
V ← unchanged

Example

SMSUBL x0, w1, w2, x5

Encoding

Binary Layout
1
00
11011
0
01
Rm
1
Ra
Rn
Rd
 
Format Data Processing
Opcode 0x9B208000
Extension Base

Operands

  • Xd
    Destination 64-bit integer register
  • Wn
    First source / base 32-bit integer register
  • Wm
    Second source / offset 32-bit integer register
  • Xa
    Minuend

Reference (Arm A64 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x9B208000 SMSUBL <Xd>, <Wn>, <Wm>, <Xa> A64 1 | 00 | 11011 | 0 | 01 | Rm | 1 | Ra | Rn | Rd

Description

Signed Multiply-Subtract Long multiplies two 32-bit register values, subtracts the product from a 64-bit register value, and writes the result to the 64-bit destination register.

Operation

bits(32) operand1 = X[n, 32];
bits(32) operand2 = X[m, 32];
bits(64) operand3 = X[a, 64];

integer result;

result = Int(operand3, FALSE) - (Int(operand1, FALSE) * Int(operand2, FALSE));
X[d, 64] = result<63:0>;