ssat

Signed Saturate (A32)

SSAT<c> <Rd>, #<imm>, <Rm> {, <shift>}

Saturates a signed value to a specified bit width.

Pseudocode Operation

shifted ← Rm << shift_amount
sat_range ← 2^(imm-1) - 1
if shifted > sat_range then
  Rd ← sat_range
  Q ← 1
else if shifted < -(2^(imm-1)) then
  Rd ← -(2^(imm-1))
  Q ← 1
else
  Rd ← shifted

Example

SSAT r0, #16, r2

Encoding

Binary Layout

cond

31:28

01101

27:23

0

22

1

21

sat_imm

20:16

Rd

15:12

imm5

11:7

0

6

01

5:4

Rn

3:0

 

Format Data Proc

Opcode 0x06A00010

Extension A32 (DSP)

Operands

• Rd
  Destination general-purpose register
• imm
  Bit Position
• Rm
  Second source / offset general-purpose register

Related

More in A32 (DSP)

Reference

View in Arm A64 ISA Reference ↗ Arm AArch32 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0x06A00050	SSAT{<c>}{<q>} <Rd>, #<imm>, <Rn>, ASR #<amount>		A32		cond | 01101 | 0 | 1 | sat_imm | Rd | imm5 | 1 | 01 | Rn
0x06A00010	SSAT{<c>}{<q>} <Rd>, #<imm>, <Rn> {, LSL #<amount>}		A32		cond | 01101 | 0 | 1 | sat_imm | Rd | imm5 | 0 | 01 | Rn
0xF3200000	SSAT{<c>}{<q>} <Rd>, #<imm>, <Rn>, ASR #<amount>		T32		11110 | 0 | 11 | 00 | 1 | 0 | Rn | 0 | imm3 | Rd | imm2 | 0 | sat_imm
0xF3000000	SSAT{<c>}{<q>} <Rd>, #<imm>, <Rn> {, LSL #<amount>}		T32		11110 | 0 | 11 | 00 | 0 | 0 | Rn | 0 | imm3 | Rd | imm2 | 0 | sat_imm

Description

Signed Saturate saturates an optionally-shifted signed value to a selectable signed range. This instruction sets PSTATE.Q to 1 if the operation saturates.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();
    operand = Shift(R[n], shift_t, shift_n, PSTATE.C);  // PSTATE.C ignored
    (result, sat) = SignedSatQ(SInt(operand), saturate_to);
    R[d] = SignExtend(result, 32);
    if sat then
        PSTATE.Q = '1';