sxtw

Sign Extend Word

SXTW <Xd>, <Wn>

Sign-extends a 32-bit register to 64 bits (Alias for SBFM).

Details

Sign-extends a 32-bit value to fill 64 bits, replicating bit 31 into all upper bits. No condition flags are affected. This is an AArch64 alias for SBFM with bit positions 0 and 31.

Pseudocode Operation

Xd ← SignExtend(Wn, 64)

Example

SXTW x0, w1

Encoding

Binary Layout
1
00
100110
1
000000
011111
Rn
Rd
 
Format Bitfield
Opcode 0x93407C00
Extension Base

Operands

  • Xd
    Dest (64)
  • Wn
    Source (32)

Reference (Arm A64 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x0414A000 SXTW <Zd>.D, <Pg>/M, <Zn>.D A64 00000100 | size | 010 | 10 | 0 | 101 | Pg | Zn | Zd
0x93407C00 SXTW <Xd>, <Wn> A64 1 | 00 | 100110 | 1 | 000000 | 011111 | Rn | Rd

Description

Sign Extend Word sign-extends a word to the size of the register, and writes the result to the destination register.