hvc

Hypervisor Call (Thumb)

HVC #<imm>

Calls the Hypervisor (EL2) from Thumb state.

Details

Generates a hypervisor call exception, transitioning to EL2 with an optional 16-bit immediate value encoding the hypervisor service request. The instruction is unconditional and available in Thumb state. Execution requires that EL2 is implemented and enabled; the hypervisor takes control and may use the immediate as a service identifier.

Pseudocode Operation

ExceptionSyndromeISS ← imm16; RaiseException(HypercallException)

Example

HVC #16

Encoding

Binary Layout
11110111111
0
imm4
10
0
0
imm12
 
Format Thumb System
Opcode 0xF7E08000
Extension A32 (Virtualization)

Operands

  • imm
    ID

Reference (Arm AArch32 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x01400070 HVC{<q>} {#}<imm16> A32 cond | 00010 | 10 | 0 | imm12 | 0111 | imm4
0xF7E08000 HVC{<q>} {#}<imm16> T32 11110111111 | 0 | imm4 | 10 | 0 | 0 | imm12

Description

Hypervisor Call causes a Hypervisor Call exception. For more information, see Hypervisor Call (HVC) exception. Software executing at EL1 can use this instruction to call the hypervisor to request a service. The HVC instruction is undefined: The HVC instruction is constrained unpredictable in Hyp mode when EL3 is implemented and using AArch32, and SCR.HCE is set to 0. On executing an HVC instruction, the HSR, Hyp Syndrome Register reports the exception as a Hypervisor Call exception, using the EC value 0x12, and captures the value of the immediate argument, see Use of the HSR.

Operation

EncodingSpecificOperations();
if PSTATE.EL IN {EL0, EL3} || !EL2Enabled() then
    UNDEFINED;

bit hvc_enable;
if HaveEL(EL3) then
    if ELUsingAArch32(EL3) && SCR.HCE == '0' && PSTATE.EL == EL2 then
        UNPREDICTABLE;
    else
        hvc_enable = SCR_GEN[].HCE;
else
    hvc_enable = if ELUsingAArch32(EL2) then NOT(HCR.HCD) else NOT(HCR_EL2.HCD);

if hvc_enable == '0' then
    UNDEFINED;
else
    AArch32.CallHypervisor(imm16);