svc
Supervisor Call (Thumb)
SVC #<imm>
System Call (Thumb encoding).
Pseudocode Operation
SupervisorCallException(imm8)
Example
SVC #16
Encoding
Binary Layout
1101111
15:9
1
8
imm8
7:0
Operands
-
imm
ID
Related
Other forms of svc
Across architectures
System Call : how x86, ARM, RISC-V, and PowerISA each do this.
More in T32 (Thumb)
Reference
View in Arm A64 ISA Reference ↗
Arm AArch32 ISA
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0x0F000000 | SVC{<c>}{<q>} {#}<imm> | A32 | cond | 1111 | imm24 | ||
| 0xDF00 | SVC{<c>}{<q>} {#}<imm> | T32 | 1101111 | 1 | imm8 |
Description
Supervisor Call causes a Supervisor Call exception. For more information, see Supervisor Call (SVC) exception. Software can use this instruction as a call to an operating system to provide a service. In the following cases, the Supervisor Call exception generated by the SVC instruction is taken to Hyp mode: In these cases, the HSR, Hyp Syndrome Register identifies that the exception entry was caused by a Supervisor Call exception, EC value 0x11, see Use of the HSR. The immediate field in the HSR:
Operation
if ConditionPassed() then
EncodingSpecificOperations();
AArch32.CheckForSVCTrap(imm32<15:0>);
AArch32.CallSupervisor(imm32<15:0>);