hvc

Hypervisor Call (A32)

HVC #<imm>

Calls the Hypervisor (EL2).

Pseudocode Operation

if ConditionPassed() then
  if not IsFeatureImplemented(HVP) then
    raise UndefinedInstruction
  else
    CallHypervisor(imm16)

Example

HVC #16

Encoding

Binary Layout

cond

31:28

00010

27:23

22:21

imm12

19:8

0111

7:4

imm4

3:0

Format System

Opcode 0x01400070

Extension A32 (System)

Operands

imm
ID

Other forms of hvc

hvc Hypervisor Call
hvc Hypervisor Call (Thumb)

Reference

View in Arm A64 ISA Reference ↗ Arm AArch32 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0x01400070	HVC{<q>} {#}<imm16>		A32		cond \| 00010 \| 10 \| 0 \| imm12 \| 0111 \| imm4
0xF7E08000	HVC{<q>} {#}<imm16>		T32		11110111111 \| 0 \| imm4 \| 10 \| 0 \| 0 \| imm12

Description

Hypervisor Call causes a Hypervisor Call exception. For more information, see Hypervisor Call (HVC) exception. Software executing at EL1 can use this instruction to call the hypervisor to request a service. The HVC instruction is undefined: The HVC instruction is constrained unpredictable in Hyp mode when EL3 is implemented and using AArch32, and SCR.HCE is set to 0. On executing an HVC instruction, the HSR, Hyp Syndrome Register reports the exception as a Hypervisor Call exception, using the EC value 0x12, and captures the value of the immediate argument, see Use of the HSR.

Operation

EncodingSpecificOperations();
if PSTATE.EL IN {EL0, EL3} || !EL2Enabled() then
    UNDEFINED;

bit hvc_enable;
if HaveEL(EL3) then
    if ELUsingAArch32(EL3) && SCR.HCE == '0' && PSTATE.EL == EL2 then
        UNPREDICTABLE;
    else
        hvc_enable = SCR_GEN[].HCE;
else
    hvc_enable = if ELUsingAArch32(EL2) then NOT(HCR.HCD) else NOT(HCR_EL2.HCD);

if hvc_enable == '0' then
    UNDEFINED;
else
    AArch32.CallHypervisor(imm16);

hvc