eret

Exception Return (A32)

ERET

Returns from an exception (A32).

Pseudocode Operation

PC ← ELR_ELx; PSTATE ← SPSR_ELx

Encoding

Binary Layout
cond
31:28
00010110
27:20
0
19
0
18
0
17
0
16
0
15
0
14
0
13
0
12
0
11
0
10
0
9
0
8
0110
7:4
1
3
1
2
1
1
0
0
 
Format System
Opcode 0x0160006E
Extension A32 (System)

Operands

Related

Other forms of eret

  • eret Exception Return
  • eret Exception Return (Thumb)

More in A32 (System)

Reference

View in Arm A64 ISA Reference ↗ Arm AArch32 ISA

Instruction Forms

Encoding Instruction ISA Bit pattern
0x0160006E ERET{<c>}{<q>} A32 cond | 00010110 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0110 | 1 | 1 | 1 | 0
0xF3DE8F00 ERET{<c>}{<q>} T32 111100111101 | 1110 | 10 | 0 | 0 | 1 | 1 | 1 | 1 | 00000000

Description

Exception Return. The PE branches to the address held in the register holding the preferred return address, and restores PSTATE from SPSR_<current_mode>. The register holding the preferred return address is: The PE checks SPSR_<current_mode> for an illegal return event. See Illegal return events from AArch32 state. Exception Return is constrained unpredictable in User mode and System mode. In Debug state, the T1 encoding of ERET executes the DRPS operation.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();
    if !Halted() then
        if PSTATE.M IN {M32_User,M32_System} then
            UNPREDICTABLE;                        // UNDEFINED or NOP
        else
            new_pc_value = if PSTATE.EL == EL2 then ELR_hyp else R[14];
            AArch32.ExceptionReturn(new_pc_value, SPSR[]);
    else                                          // Perform DRPS operation in Debug state
        if PSTATE.M == M32_User then
            UNDEFINED;
        elsif PSTATE.M == M32_System then
            UNPREDICTABLE;                        // UNDEFINED or NOP
        else
            SynchronizeContext();
            DebugRestorePSR();