tlbi

TLB Invalidate

TLBI <op> {, <Xt>}

Invalidates Translation Lookaside Buffer entries.

Details

TLB Invalidate invalidates one or more entries in the Translation Lookaside Buffer to ensure MMU coherency after page table modifications. The operation specifies the scope (single address, all, broadcast, etc.) and Xt provides the target address when applicable. No condition flags are affected. AArch64-only; requires EL1 or higher privilege and typically triggers ISB for completion.

Pseudocode Operation

TLBInvalidate(op, address ← Xt); // Operation type determined by op, affecting VMALLE1, VAE1, VAAE1, VALE1, etc.

Example

TLBI op

Encoding

Binary Layout
1101010100
0
01
op1
CRn
CRm
op2
Rt
 
Format System Alias
Opcode 0xD5088000
Extension System

Operands

  • op
    Operation (VMALLE1, VAE1)
  • Xt
    Address (Optional)

Reference (Arm A64 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0xD5088000 TLBI <tlbi_op>{, <Xt>} A64 1101010100 | 0 | 01 | op1 | CRn | CRm | op2 | Rt

Description

TLB Invalidate operation. For more information, see op0==0b01, cache maintenance, TLB maintenance, and address translation instructions.