udiv

Unsigned Divide (Thumb)

UDIV <Rd>, <Rn>, <Rm>

Unsigned integer division.

Pseudocode Operation

if Rm == 0 then UNPREDICTABLE else Rd ← UnsignedDivide(Rn, Rm)

Example

UDIV r0, r1, r2

Encoding

Binary Layout

111110111

31:23

011

22:20

Rn

19:16

1111

15:12

Rd

11:8

1111

7:4

Rm

3:0

 

Format Thumb Div

Opcode 0xFBB0F0F0

Extension A32 (Base)

Operands

• Rd
  Destination general-purpose register
• Rn
  Dividend
• Rm
  Divisor

Related

Other forms of udiv

• udiv SVE Unsigned Divide
• udiv Unsigned Divide
• udiv Unsigned Divide (A32)

Across architectures

Integer Divide : how x86, ARM, RISC-V, and PowerISA each do this.

More in A32 (Base)

Reference

View in Arm A64 ISA Reference ↗ Arm AArch32 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0x0730F010	UDIV{<c>}{<q>} {<Rd>,} <Rn>, <Rm>		A32		cond | 01110 | 011 | Rd | 1111 | Rm | 000 | 1 | Rn
0xFBB0F0F0	UDIV{<c>}{<q>} {<Rd>,} <Rn>, <Rm>		T32		111110111 | 011 | Rn | 1111 | Rd | 1111 | Rm

Description

Unsigned Divide divides a 32-bit unsigned integer register value by a 32-bit unsigned integer register value, and writes the result to the destination register. The condition flags are not affected. See Divide instructions for more information about this instruction.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();
    integer result;
    if UInt(R[m]) == 0 then
        result = 0;
    else
        result = RoundTowardsZero(Real(UInt(R[n])) / Real(UInt(R[m])));
    R[d] = result<31:0>;