umlal

Unsigned Multiply Accumulate Long (Thumb)

UMLAL <RdLo>, <RdHi>, <Rn>, <Rm>

Unsigned Multiply Accumulate (64-bit result).

Pseudocode Operation

product ← ZeroExtend(Rn, 64) × ZeroExtend(Rm, 64)
accumulator ← (RdHi << 32) | RdLo
result ← accumulator + product
RdLo ← result[31:0]
RdHi ← result[63:32]

Example

UMLAL r1, r0, r1, r2

Encoding

Binary Layout

111110111

31:23

110

22:20

19:16

RdLo

15:12

RdHi

11:8

0000

7:4

3:0

Format Thumb Mul

Opcode 0xFBE00000

Extension A32 (Base)

Operands

RdLo
Low
RdHi
High
Rn
First source / base general-purpose register
Rm
Second source / offset general-purpose register

Other forms of umlal

umlal Unsigned Multiply Accumulate Long (A32)
umlal Unsigned Multiply-Accumulate Long

Reference

View in Arm A64 ISA Reference ↗ Arm AArch32 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0x00A00090	UMLAL{<c>}{<q>} <RdLo>, <RdHi>, <Rn>, <Rm>		A32		cond \| 0000 \| 101 \| 0 \| RdHi \| RdLo \| Rm \| 1001 \| Rn
0xFBE00000	UMLAL{<c>}{<q>} <RdLo>, <RdHi>, <Rn>, <Rm>		T32		111110111 \| 110 \| Rn \| RdLo \| RdHi \| 0000 \| Rm

Description

Unsigned Multiply Accumulate Long multiplies two unsigned 32-bit values to produce a 64-bit value, and accumulates this with a 64-bit value. In A32 instructions, the condition flags can optionally be updated based on the result. Use of this option adversely affects performance on many implementations.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();
    result = UInt(R[n]) * UInt(R[m]) + UInt(R[dHi]:R[dLo]);
    R[dHi] = result<63:32>;
    R[dLo] = result<31:0>;
    if setflags then
        PSTATE.N = result<63>;
        PSTATE.Z = IsZeroBit(result<63:0>);
        // PSTATE.C, PSTATE.V unchanged