umlal

Unsigned Multiply Accumulate Long (A32)

UMLAL{S}<c> <RdLo>, <RdHi>, <Rn>, <Rm>

Unsigned (Rn * Rm) + 64-bit Accumulator.

Pseudocode Operation

accumulator ← (RdHi << 32) | RdLo
product ← (Rn × Rm)
result ← accumulator + product
RdHi ← result[63:32]
RdLo ← result[31:0]
if S == 1 then
  N ← result[63]
  Z ← (result == 0)
endif

Example

UMLAL r1, r0, r1, r2

Encoding

Binary Layout

cond

31:28

0000

27:24

101

23:21

RdHi

19:16

RdLo

15:12

11:8

1001

7:4

3:0

Format Multiply

Opcode 0x00A00090

Extension A32 (Base)

Operands

RdLo
Low
RdHi
High
Rn
First source / base general-purpose register
Rm
Second source / offset general-purpose register

Other forms of umlal

umlal Unsigned Multiply Accumulate Long (Thumb)
umlal Unsigned Multiply-Accumulate Long

Reference

View in Arm A64 ISA Reference ↗ Arm AArch32 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0x00A00090	UMLAL{<c>}{<q>} <RdLo>, <RdHi>, <Rn>, <Rm>		A32		cond \| 0000 \| 101 \| 0 \| RdHi \| RdLo \| Rm \| 1001 \| Rn
0xFBE00000	UMLAL{<c>}{<q>} <RdLo>, <RdHi>, <Rn>, <Rm>		T32		111110111 \| 110 \| Rn \| RdLo \| RdHi \| 0000 \| Rm

Description

Unsigned Multiply Accumulate Long multiplies two unsigned 32-bit values to produce a 64-bit value, and accumulates this with a 64-bit value. In A32 instructions, the condition flags can optionally be updated based on the result. Use of this option adversely affects performance on many implementations.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();
    result = UInt(R[n]) * UInt(R[m]) + UInt(R[dHi]:R[dLo]);
    R[dHi] = result<63:32>;
    R[dLo] = result<31:0>;
    if setflags then
        PSTATE.N = result<63>;
        PSTATE.Z = IsZeroBit(result<63:0>);
        // PSTATE.C, PSTATE.V unchanged