br

Branch to Register

BR <Xn>

Indirect branch to address in Xn.

Details

Branch to register: indirect unconditional branch to the address held in Xn. No condition flags are affected. This is an AArch64-only instruction.

Pseudocode Operation

PC ← Xn

Example

BR x1

Encoding

Binary Layout
1101011
0
0
00
11111
0000
0
0
Rn
00000
 
Format Branch (Reg)
Opcode 0xD61F0000
Extension Base

Operands

  • Xn
    Target Address

Reference (Arm A64 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0xD61F0000 BR <Xn> A64 1101011 | 0 | 0 | 00 | 11111 | 0000 | 0 | 0 | Rn | 00000

Description

Branch to Register branches unconditionally to an address in a register, with a hint that this is not a subroutine return.

Operation

bits(64) target = X[n, 64];

// Value in BTypeNext will be used to set PSTATE.BTYPE
if InGuardedPage then
    if n == 16 || n == 17 then
        BTypeNext = '01';
    else
        BTypeNext = '11';
else
    BTypeNext = '01';
BranchTo(target, BranchType_INDIR, FALSE);