cls

Count Leading Sign Bits

CLS <Wd>, <Wn>

Counts number of consecutive sign bits.

Details

Counts the number of consecutive sign bits starting from bit 31 (for 32-bit operands) and writes the count to the destination register. Sign bits are those that match the most significant bit. Condition flags (N, Z, C, V) are not affected. Executes in AArch64 state only.

Pseudocode Operation

count ← 0
msb ← Wn[31]
for i = 30 downto 0
  if Wn[i] == msb then
    count ← count + 1
  else
    break
Wd ← count

Example

CLS w0, w1

Encoding

Binary Layout
0
1
0
11010110
00000
00010
1
Rn
Rd
 
Format Data Processing
Opcode 0x5AC01400
Extension Base

Operands

  • Wd
    Destination 32-bit integer register
  • Wn
    First source / base 32-bit integer register

Reference (Arm A64 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x0E204800 CLS <Vd>.<T>, <Vn>.<T> A64 0 | Q | 0 | 01110 | size | 10000 | 00100 | 10 | Rn | Rd
0x5AC01400 CLS <Wd>, <Wn> A64 0 | 1 | 0 | 11010110 | 00000 | 00010 | 1 | Rn | Rd
0xDAC01400 CLS <Xd>, <Xn> A64 1 | 1 | 0 | 11010110 | 00000 | 00010 | 1 | Rn | Rd
0x0418A000 CLS <Zd>.<T>, <Pg>/M, <Zn>.<T> A64 00000100 | size | 011 | 00 | 0 | 101 | Pg | Zn | Zd

Description

Count Leading Sign bits counts the number of leading bits of the source register that have the same value as the most significant bit of the register, and writes the result to the destination register. This count does not include the most significant bit of the source register.

Operation

integer result;
bits(datasize) operand1 = X[n, datasize];

result = CountLeadingSignBits(operand1);

X[d, datasize] = result<datasize-1:0>;