sha256h2

SHA256 Hash Part 2 (A64)

SHA256H2 <Qd>, <Qn>, <Vm>.4S

SHA256 hash part 2 (AArch64 NEON).

Pseudocode Operation

hash_state ← SHA256HashPart2(Qn, Vm.4S)
Qd ← hash_state

Example

SHA256H2 q0, q1, v2.4s.4S

Encoding

Binary Layout

01011110

31:24

00

23:22

0

21

Rm

20:16

010

15:13

1

12

00

11:10

Rn

9:5

Rd

4:0

 

Format Crypto

Opcode 0x5E005000

Extension Crypto

Operands

• Qd
  Destination 128-bit SIMD register
• Qn
  First source 128-bit SIMD register
• Vm
  Second source SIMD/FP vector register

Related

Other forms of sha256h2

• sha256h2 SHA256 Hash Part 2 (A32)
• sha256h2 SHA256 Hash Part 2

More in Crypto

Reference

View in Arm A64 ISA Reference ↗ Arm A64 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0x5E005000	SHA256H2 <Qd>, <Qn>, <Vm>.4S		A64		01011110 | 00 | 0 | Rm | 010 | 1 | 00 | Rn | Rd

Description

SHA256 hash update (part 2).

Operation

AArch64.CheckFPAdvSIMDEnabled();

bits(128) result;
result = SHA256hash(V[n, 128], V[d, 128], V[m, 128], FALSE);
V[d, 128] = result;