dup

Duplicate Vector Element (Scalar)

DUP <Vd>.<T>, <R><n>

Duplicates a general-purpose register to all vector elements.

Pseudocode Operation

element_size = decode_imm5(imm5)
for i = 0 to elements_in_vector-1:
  Vd[element][element_size-1:0] = Rn[element_size-1:0]

Example

DUP v0.4s.T, Rn

Encoding

Binary Layout

01110000

28:21

imm5

20:16

0000

14:11

9:5

4:0

Format SIMD Copy

Opcode 0x0E000C00

Extension NEON (SIMD)

Operands

Vd
Dest Vector
Rn
Src GPR

Other forms of dup

dup Duplicate Vector Element (Element)
dup SVE Duplicate Scalar

Reference

View in Arm A64 ISA Reference ↗ Arm A64 ISA

Instruction Forms

Encoding	Instruction	ISA	Bit pattern
0x5E000400	DUP <V><d>, <Vn>.<T>[<index>]	A64	01 \| 0 \| 11110000 \| imm5 \| 0 \| 0000 \| 1 \| Rn \| Rd
0x0E000400	DUP <Vd>.<T>, <Vn>.<Ts>[<index>]	A64	0 \| Q \| 0 \| 01110000 \| imm5 \| 0 \| 0000 \| 1 \| Rn \| Rd
0x0E000C00	DUP <Vd>.<T>, <R><n>	A64	0 \| Q \| 0 \| 01110000 \| imm5 \| 0 \| 0001 \| 1 \| Rn \| Rd
0x2538C000	DUP <Zd>.<T>, #<imm>{, <shift>}	A64	00100101 \| size \| 111 \| 0 \| 0 \| 011 \| sh \| imm8 \| Zd
0x05203800	DUP <Zd>.<T>, <R><n\|SP>	A64	00000101 \| size \| 100000001110 \| Rn \| Zd
0x05202000	DUP <Zd>.<T>, <Zn>.<T>[<imm>]	A64	00000101 \| imm2 \| 1 \| tsz \| 001000 \| Zn \| Zd

Description

Duplicate vector element to vector or scalar. This instruction duplicates the vector element at the specified element index in the source SIMD&FP register into a scalar or each element in a vector, and writes the result to the destination SIMD&FP register. Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.

Operation

CheckFPAdvSIMDEnabled64();
bits(idxdsize) operand = V[n, idxdsize];
bits(datasize) result;
bits(esize) element;

element = Elem[operand, index, esize];
for e = 0 to elements-1
    Elem[result, e, esize] = element;
V[d, datasize] = result;

dup