fadd
Floating-Point Add (Half-Precision)
FADD <Vd>.8H, <Vn>.8H, <Vm>.8H
Adds two half-precision floating-point vectors.
Details
The Floating-Point Add instruction adds two half-precision floating-point vectors.
Pseudocode Operation
Vd ← Vn + Vm
// Flags affected: N, Z, C, V
Example
FADD v0.4s.8H, v1.4s.8H, v2.4s.8H
Encoding
Binary Layout
01001110
010
11111
00010
Vm
Vn
Vd
Operands
-
Vd
Destination SIMD/FP vector register -
Vn
First source SIMD/FP vector register -
Vm
Second source SIMD/FP vector register