revsh

Reverse Signed Halfword (Thumb)

REVSH <Rd>, <Rm>

Reverse bytes in low halfword, sign extend (Thumb).

Details

Reverse Signed Halfword reverses the byte order of the low 16 bits of Rm, then sign-extends the result to 32 bits and writes it to Rd. This is commonly used to perform endian conversion on signed 16-bit values. No condition flags are modified. This instruction executes only in T32 (Thumb) state.

Pseudocode Operation

halfword ← Rm[15:0];
reversed ← (halfword[7:0] << 8) | halfword[15:8];
Rd ← SignExtend(reversed, 16)

Example

REVSH r0, r2

Encoding

Binary Layout
10111010
11
Rm
Rd
 
Format Thumb Data Proc
Opcode 0xBAC0
Extension T32 (Thumb)

Operands

  • Rd
    Destination general-purpose register
  • Rm
    Second source / offset general-purpose register

Reference (Arm AArch32 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x06FF0FB0 REVSH{<c>}{<q>} <Rd>, <Rm> A32 cond | 01101 | 1 | 11 | 1 | 1 | 1 | 1 | Rd | 1 | 1 | 1 | 1 | 1 | 011 | Rm
0xBAC0 REVSH{<c>}{<q>} <Rd>, <Rm> T32 10111010 | 11 | Rm | Rd
0xFA90F0B0 REVSH{<c>}.W <Rd>, <Rm> T32 111110101 | 001 | Rn | 1111 | Rd | 10 | 11 | Rm

Description

Byte-Reverse Signed Halfword reverses the byte order in the lower 16-bit halfword of a 32-bit register, and sign-extends the result to 32 bits.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();
    bits(32) result;
    result<31:8>  = SignExtend(R[m]<7:0>, 24);
    result<7:0>   = R[m]<15:8>;
    R[d] = result;