vrintr

Vector Round Floating-Point (Current)

VRINTR<c>.F32 <Sd>, <Sm>

Rounds float to integral float using FPSCR rounding mode.

Details

The Vector Round Floating-Point instruction rounds float to integral float using FPSCR rounding mode.

Pseudocode Operation

// Rounds float to integral float using FPSCR rounding mode

Example

VRINTR.F32 s0, s2

Encoding

Binary Layout
cond
11101011
0
D
0110
Vd
1010
01
M
0
Vm
 
Format VFP Unary
Opcode 0xEB60A40
Extension VFP (Float)

Operands

  • Sd
    Destination 32-bit floating-point register
  • Sm
    Second source 32-bit floating-point register