pkhbt

Pack Halfword Bottom Top

PKHBT<c> <Rd>, <Rn>, <Rm> {, LSL #<imm>}

Combines bottom half of Rn with top half of shifted Rm.

Details

Packs the bottom halfword of Rn with the top halfword of (Rm shifted left). Assembles a 32-bit result by taking bits [15:0] from Rn and bits [31:16] from the shifted Rm. Condition flags N, Z, C, V are unaffected. A32-only instruction requiring DSP extension.

Pseudocode Operation

Rd[15:0] ← Rn[15:0]
shifted_rm ← Rm << shift_imm
Rd[31:16] ← shifted_rm[31:16]

Example

PKHBT r0, r1, r2

Encoding

Binary Layout
cond
01101000
Rn
Rd
imm5
0
01
Rm
 
Format Data Proc
Opcode 0x06800010
Extension A32 (DSP)

Operands

  • Rd
    Destination general-purpose register
  • Rn
    Bottom Src
  • Rm
    Top Src

Reference (Arm AArch32 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x06800010 PKHBT{<c>}{<q>} {<Rd>,} <Rn>, <Rm> {, LSL #<imm>} A32 cond | 01101000 | Rn | Rd | imm5 | 0 | 01 | Rm
0xEAC00000 PKHBT{<c>}{<q>} {<Rd>,} <Rn>, <Rm> {, LSL #<imm>} T32 1110101 | 0110 | 0 | Rn | 0 | imm3 | Rd | imm2 | 0 | 0 | Rm

Description

Pack Halfword combines one halfword of its first operand with the other halfword of its shifted second operand.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();
    operand2 = Shift(R[m], shift_t, shift_n, PSTATE.C);  // PSTATE.C ignored
    R[d]<15:0>  = if tbform then operand2<15:0> else R[n]<15:0>;
    R[d]<31:16> = if tbform then R[n]<31:16>    else operand2<31:16>;