fmaxv
Floating-Point Maximum Reduction (NEON)
FMAXV <Sd>, <Vn>.<T>
Details
The Floating-Point Maximum Reduction instruction finds max float in a vector.
Pseudocode Operation
Sd ← Vn ? SRC2
Example
FMAXV s0, v1.4s.T
Encoding
Binary Layout
01101110
00110000
111110
Rn
Rd
Operands
-
Sd
Destination 32-bit floating-point register -
Vn
First source SIMD/FP vector register