umaddl

Unsigned Multiply-Add Long

UMADDL <Xd>, <Wn>, <Wm>, <Xa>

Multiplies two 32-bit regs, adds to 64-bit reg (Unsigned).

Details

Multiplies the unsigned 32-bit values in Wn and Wm as an unsigned product (64-bit intermediate), then adds the 64-bit value in Xa, storing the 64-bit result in Xd. This is AArch64-only. No arithmetic flags are affected.

Pseudocode Operation

Xd ← (Wn × Wm) + Xa

Example

UMADDL x0, w1, w2, x5

Encoding

Binary Layout
1
00
11011
1
01
Rm
0
Ra
Rn
Rd
 
Format Data Processing
Opcode 0x9BA00000
Extension Base

Operands

  • Xd
    Destination 64-bit integer register
  • Wn
    First source / base 32-bit integer register
  • Wm
    Second source / offset 32-bit integer register
  • Xa
    Addend

Reference (Arm A64 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x9BA00000 UMADDL <Xd>, <Wn>, <Wm>, <Xa> A64 1 | 00 | 11011 | 1 | 01 | Rm | 0 | Ra | Rn | Rd

Description

Unsigned Multiply-Add Long multiplies two 32-bit register values, adds a 64-bit register value, and writes the result to the 64-bit destination register.

Operation

bits(32) operand1 = X[n, 32];
bits(32) operand2 = X[m, 32];
bits(64) operand3 = X[a, 64];

integer result;

result = Int(operand3, TRUE) + (Int(operand1, TRUE) * Int(operand2, TRUE));

X[d, 64] = result<63:0>;