sxtab16
Signed Extend and Add Byte 16
SXTAB16<c> <Rd>, <Rn>, <Rm> {, <rotation>}
Sign-extends two bytes and adds to two halfwords.
Details
Sign-extends the least significant byte and the most significant byte of the low halfword from Rm (optionally rotated), adds them separately to the two halfwords of Rn, and writes the results to Rd. This is an A32 instruction that operates on general-purpose registers and does not affect the condition flags. Useful for parallel byte-to-halfword sign-extension and accumulation.
Pseudocode Operation
rotated ← ROR(Rm, rotation)
byte0 ← rotated[7:0]
byte1 ← rotated[15:8]
sign_ext0 ← SignExtend(byte0, 16)
sign_ext1 ← SignExtend(byte1, 16)
Rd[15:0] ← Rn[15:0] + sign_ext0
Rd[31:16] ← Rn[31:16] + sign_ext1Example
SXTAB16 r0, r1, r2
Encoding
Binary Layout
cond
01101
0
00
Rn
Rd
rotate
0
0
0111
Rm
Operands
-
Rd
Destination general-purpose register -
Rn
Accumulator -
Rm
Second source / offset general-purpose register
Reference (Arm AArch32 ISA)
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0x06800070 | SXTAB16{<c>}{<q>} {<Rd>,} <Rn>, <Rm> {, ROR #<amount>} | A32 | cond | 01101 | 0 | 00 | Rn | Rd | rotate | 0 | 0 | 0111 | Rm | ||
| 0xFA20F080 | SXTAB16{<c>}{<q>} {<Rd>,} <Rn>, <Rm> {, ROR #<amount>} | T32 | 111110100 | 01 | 0 | Rn | 1111 | Rd | 1 | 0 | rotate | Rm |
Description
Signed Extend and Add Byte 16 extracts two 8-bit values from a register, sign-extends them to 16 bits each, adds the results to two 16-bit values from another register, and writes the final results to the destination register. The instruction can specify a rotation by 0, 8, 16, or 24 bits before extracting the 8-bit values.
Operation
if ConditionPassed() then
EncodingSpecificOperations();
rotated = ROR(R[m], rotation);
R[d]<15:0> = R[n]<15:0> + SignExtend(rotated<7:0>, 16);
R[d]<31:16> = R[n]<31:16> + SignExtend(rotated<23:16>, 16);