dc

Data Cache Operation

DC <op>, <Xt>

Performs data cache maintenance (Clean, Invalidate, Flush).

Details

Data Cache Operation performs maintenance on the data cache, including invalidate, clean, and flush operations on cache lines. The operation type and target address/set/way are specified by the op and Xt operands. This instruction affects the cache hierarchy and may cause memory barriers; no condition flags are modified. AArch64-only; may require EL1 or higher depending on the operation.

Pseudocode Operation

CacheMaintenance(op, address ← Xt); // Operation type determined by op, affecting DC_VAU, DC_IVAC, DC_ISW, etc.

Example

DC op, x3

Encoding

Binary Layout
1101010100
0
01
op1
0111
CRm
op2
Rt
 
Format System Alias
Opcode 0xD5087000
Extension System

Operands

  • op
    Operation (IVAC, ISW, etc)
  • Xt
    Address/Set/Way

Reference (Arm A64 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0xD5087000 DC <dc_op>, <Xt> A64 1101010100 | 0 | 01 | op1 | 0111 | CRm | op2 | Rt

Description

Data Cache operation. For more information, see op0==0b01, cache maintenance, TLB maintenance, and address translation instructions.