dc

Data Cache Operation

DC <op>, <Xt>

Performs data cache maintenance (Clean, Invalidate, Flush).

Pseudocode Operation

CacheMaintenance(op, address ← Xt); // Operation type determined by op, affecting DC_VAU, DC_IVAC, DC_ISW, etc.

Example

DC op, x3

Encoding

Binary Layout

1101010100

31:22

0

21

01

20:19

op1

18:16

0111

15:12

CRm

11:8

op2

7:5

Rt

4:0

 

Format System Alias

Opcode 0xD5087000

Extension System

Operands

• op
  Operation (IVAC, ISW, etc)
• Xt
  Address/Set/Way

Related

Across architectures

Cache Line Flush : how x86, ARM, RISC-V, and PowerISA each do this.

More in System

Reference

View in Arm A64 ISA Reference ↗ Arm A64 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0xD5087000	DC <dc_op>, <Xt>		A64		1101010100 | 0 | 01 | op1 | 0111 | CRm | op2 | Rt

Description

Data Cache operation. For more information, see op0==0b01, cache maintenance, TLB maintenance, and address translation instructions.