mov
Vector Move (Register)
MOV <Vd>.<T>, <Vn>.<T>
Copies a vector register (Alias for ORR Vd, Vn, Vn).
Details
Copies a SIMD vector register to another. This is an alias for ORR Vd, Vn, Vn that performs a bitwise OR of Vn with itself, resulting in an identical copy. No condition flags are affected; the instruction operates on all elements simultaneously.
Pseudocode Operation
Vd ← VnExample
MOV v0.4s.T, v1.4s.T
Encoding
Binary Layout
0
Q
0
01110
10
1
Rm
00011
1
Rn
Rd
Operands
-
Vd
Destination SIMD/FP vector register -
Vn
First source SIMD/FP vector register
Reference (Arm A64 ISA)
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0x11000000 | MOV <Wd|WSP>, <Wn|WSP> | A64 | 0 | 0 | 0 | 100010 | 0 | 000000000000 | Rn | Rd | ||
| 0x91000000 | MOV <Xd|SP>, <Xn|SP> | A64 | 1 | 0 | 0 | 100010 | 0 | 000000000000 | Rn | Rd | ||
| 0x25004000 | MOV <Pd>.B, <Pg>/Z, <Pn>.B | A64 | 00100101 | 0 | 0 | 00 | Pm | 01 | Pg | 0 | Pn | 0 | Pd | ||
| 0x05100000 | MOV <Zd>.<T>, <Pg>/Z, #<imm>{, <shift>} | A64 | 00000101 | size | 01 | Pg | 0 | 0 | sh | imm8 | Zd | ||
| 0x05104000 | MOV <Zd>.<T>, <Pg>/M, #<imm>{, <shift>} | A64 | 00000101 | size | 01 | Pg | 0 | 1 | sh | imm8 | Zd | ||
| 0x0528A000 | MOV <Zd>.<T>, <Pg>/M, <R><n|SP> | A64 | 00000101 | size | 101000101 | Pg | Rn | Zd | ||
| 0x05208000 | MOV <Zd>.<T>, <Pg>/M, <V><n> | A64 | 00000101 | size | 100000100 | Pg | Vn | Zd | ||
| 0x5E000400 | MOV <V><d>, <Vn>.<T>[<index>] | A64 | 01 | 0 | 11110000 | imm5 | 0 | 0000 | 1 | Rn | Rd | ||
| 0x2538C000 | MOV <Zd>.<T>, #<imm>{, <shift>} | A64 | 00100101 | size | 111 | 0 | 0 | 011 | sh | imm8 | Zd | ||
| 0x05203800 | MOV <Zd>.<T>, <R><n|SP> | A64 | 00000101 | size | 100000001110 | Rn | Zd | ||
| 0x05202000 | MOV <Zd>.<T>, <Zn>.<T>[<imm>] | A64 | 00000101 | imm2 | 1 | tsz | 001000 | Zn | Zd | ||
| 0x05202000 | MOV <Zd>.<T>, <V><n> | A64 | 00000101 | imm2 | 1 | tsz | 001000 | Zn | Zd | ||
| 0x05C00000 | MOV <Zd>.<T>, #<const> | A64 | 00000101110000 | imm13 | Zd | ||
| 0x6E000400 | MOV <Vd>.<Ts>[<index1>], <Vn>.<Ts>[<index2>] | A64 | 0 | 1 | 1 | 01110000 | imm5 | 0 | imm4 | 1 | Rn | Rd |
Description
Move vector. This instruction copies the vector in the source SIMD&FP register into the destination SIMD&FP register.
Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.