cmn

Compare Negative (Immediate)

CMN <Wn>, #<imm>

Adds register and immediate, updates flags (discard result). (Alias for ADDS)

Pseudocode Operation

result ← Wn + imm
N ← result[31]
Z ← (result == 0)
C ← CarryOut(Wn + imm)
V ← OverflowFrom(Wn + imm)

Example

CMN w1, #16

Encoding

Binary Layout

100010

28:23

imm12

21:10

9:5

11111

4:0

Format Data Processing

Opcode 0x3100001F

Extension Base

Operands

Wn
First source / base 32-bit integer register
imm
Imm

Other forms of cmn

cmn Compare Negative (A32)

Reference

View in Arm A64 ISA Reference ↗ Arm A64 ISA

Instruction Forms

Encoding	Instruction	ISA	Bit pattern
0x2B20001F	CMN <Wn\|WSP>, <Wm>{, <extend> {#<amount>}}	A64	0 \| 0 \| 1 \| 01011 \| 00 \| 1 \| Rm \| option \| imm3 \| Rn \| 11111
0xAB20001F	CMN <Xn\|SP>, <R><m>{, <extend> {#<amount>}}	A64	1 \| 0 \| 1 \| 01011 \| 00 \| 1 \| Rm \| option \| imm3 \| Rn \| 11111
0x3100001F	CMN <Wn\|WSP>, #<imm>{, <shift>}	A64	0 \| 0 \| 1 \| 100010 \| sh \| imm12 \| Rn \| 11111
0xB100001F	CMN <Xn\|SP>, #<imm>{, <shift>}	A64	1 \| 0 \| 1 \| 100010 \| sh \| imm12 \| Rn \| 11111
0x2B00001F	CMN <Wn>, <Wm>{, <shift> #<amount>}	A64	0 \| 0 \| 1 \| 01011 \| shift \| 0 \| Rm \| imm6 \| Rn \| 11111
0xAB00001F	CMN <Xn>, <Xm>{, <shift> #<amount>}	A64	1 \| 0 \| 1 \| 01011 \| shift \| 0 \| Rm \| imm6 \| Rn \| 11111

Description

Compare Negative (immediate) adds a register value and an optionally-shifted immediate value. It updates the condition flags based on the result, and discards the result.

cmn