sha256h
SHA256 Hash Part 1 (A32)
SHA256H.32 <Qd>, <Qn>, <Qm>
SHA256 hash update (part 1).
Pseudocode Operation
hash_state ← Qd;
w_data ← Qn;
data_words ← Qm;
temp ← SHA256_CH(hash_state.word[1], hash_state.word[2], hash_state.word[3]);
temp ← temp + SHA256_SUM1(hash_state.word[1]);
temp ← temp + data_words;
Qd.word[0] ← Qd.word[0] + temp;
Qd.word[1] ← hash_state.word[0];
Example
SHA256H.32 q0, q1, q2
Reference
View in Arm A64 ISA Reference ↗
Arm A64 ISA
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0x5E004000 | SHA256H <Qd>, <Qn>, <Vm>.4S | A64 | 01011110 | 00 | 0 | Rm | 010 | 0 | 00 | Rn | Rd |
Description
SHA256 hash update (part 1).
Operation
AArch64.CheckFPAdvSIMDEnabled(); bits(128) result; result = SHA256hash(V[d, 128], V[n, 128], V[m, 128], TRUE); V[d, 128] = result;