sxtb
Signed Extend Byte (A32)
SXTB<c> <Rd>, <Rm> {, <rotation>}
Sign-extends the low byte (8-bits) to 32-bits.
Details
Sign-extends the low byte of Rm into the full 32-bit word in Rd, with optional pre-rotation of Rm by 0, 8, 16, or 24 bits. This is an A32 instruction that does not affect any condition flags. The rotation is applied before the sign extension.
Pseudocode Operation
rotated ← ROR(Rm, rotation)
Rd ← SignExtend(rotated[7:0], 32)
Example
SXTB r0, r2
Encoding
Binary Layout
cond
01101
0
10
1111
Rd
rotate
0
0
0111
Rm
Operands
-
Rd
Destination general-purpose register -
Rm
Second source / offset general-purpose register
Reference (Arm AArch32 ISA)
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0x06AF0070 | SXTB{<c>}{<q>} {<Rd>,} <Rm> {, ROR #<amount>} | A32 | cond | 01101 | 0 | 10 | 1111 | Rd | rotate | 0 | 0 | 0111 | Rm | ||
| 0xB240 | SXTB{<c>}{<q>} {<Rd>,} <Rm> | T32 | 10110010 | 0 | 1 | Rm | Rd | ||
| 0xFA4FF080 | SXTB{<c>}.W {<Rd>,} <Rm> | T32 | 111110100 | 10 | 0 | 1111 | 1111 | Rd | 1 | 0 | rotate | Rm |
Description
Signed Extend Byte extracts an 8-bit value from a register, sign-extends it to 32 bits, and writes the result to the destination register. The instruction can specify a rotation by 0, 8, 16, or 24 bits before extracting the 8-bit value.
Operation
if ConditionPassed() then
EncodingSpecificOperations();
rotated = ROR(R[m], rotation);
R[d] = SignExtend(rotated<7:0>, 32);