tstart

Transaction Start

TSTART <Xd>

Starts a memory transaction. Returns 0 if successful.

Details

Transaction Start initiates a memory transaction and stores a status value in Xd; a return value of 0 indicates successful transaction start, while non-zero indicates transaction failure or nesting restriction. This is an AArch64-only instruction requiring TME (Transactional Memory Extension) support and must execute at EL0 or higher. No condition flags are affected; the instruction may cause transaction abort exceptions.

Pseudocode Operation

status ← AttemptTransactionStart()
Xd ← status
if status == 0 then
  EnterTransactionMode()
else
  Transaction not started, handle abort reason in status value
endif

Example

TSTART x0

Encoding

Binary Layout

1101010100100

011

0011

0000

011

Format System

Opcode 0xD5233060

Extension TME (Transactional)

Operands

Xd
Destination 64-bit integer register

Reference (Arm A64 ISA)

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0xD5233060	TSTART <Xt>		A64		1101010100100 \| 011 \| 0011 \| 0000 \| 011 \| Rt

Description

This instruction starts a new transaction. If the transaction started successfully, the destination register is set to zero. If the transaction failed or was canceled, then all state modifications that were performed transactionally are discarded and the destination register is written with a nonzero value that encodes the cause of the failure.

Operation

if !IsTMEEnabled() then UNDEFINED;

boolean IsEL1Regime;
bit tme;
bit tmt;
case PSTATE.EL of
    when EL0
        IsEL1Regime = S1TranslationRegime() == EL1;
        if IsEL1Regime then
            tme = SCTLR_EL1.TME0;
            tmt = SCTLR_EL1.TMT0;
        else
            tme = SCTLR_EL2.TME0;
            tmt = SCTLR_EL2.TMT0;
    when EL1
        tme = SCTLR_EL1.TME;
        tmt = SCTLR_EL1.TMT;
    when EL2
        tme = SCTLR_EL2.TME;
        tmt = SCTLR_EL2.TMT;
    when EL3
        tme = SCTLR_EL3.TME;
        tmt = SCTLR_EL3.TMT;
    otherwise
        Unreachable();

boolean enable = tme == '1';
boolean trivial = tmt == '1';

if !enable then
    TransactionStartTrap(t);
elsif trivial then
    TSTATE.nPC = NextInstrAddr(64);
    TSTATE.Rt = t;
    FailTransaction(TMFailure_TRIVIAL, FALSE);
elsif IsFeatureImplemented(FEAT_SME) && PSTATE.SM == '1' then
    FailTransaction(TMFailure_ERR, FALSE);
elsif TSTATE.depth == 255 then
    FailTransaction(TMFailure_NEST, FALSE);
elsif TSTATE.depth == 0 then
    TSTATE.nPC = NextInstrAddr(64);
    TSTATE.Rt = t;
    ClearExclusiveLocal(ProcessorID());
    TakeTransactionCheckpoint();
    StartTrackingTransactionalReadsWrites();

TSTATE.depth = TSTATE.depth + 1;
X[t, 64] = Zeros(64);