vrev64

Vector Reverse 64

VREV64<c>.<dt> <Qd>, <Qm>

Reverses elements within 64-bit doublewords.

Details

The Vector Reverse 64 instruction reverses elements within 64-bit doublewords.

Pseudocode Operation

// Reverses elements within 64-bit doublewords

Example

VREV64.dt q0, q2

Encoding

Binary Layout
11110011
1
D
11
sz
00
Vd
00000
Q
M
0
Vm
 
Format NEON 2-Reg
Opcode 0xF3B00000
Extension NEON (SIMD)

Operands

  • Qd
    Destination 128-bit SIMD register
  • Qm
    Second source 128-bit SIMD register