strh
Store Register Halfword (Immediate)
STRH <Wt>, [<Xn|SP>, #<pimm>]
Stores the low halfword of a register.
Details
Stores the low halfword (bits 15:0) of a 32-bit register to memory at an address calculated from a base register and a positive immediate offset (scaled by 2). Does not affect condition flags. AArch64-only instruction.
Pseudocode Operation
address ← Xn + (imm12 << 1)
[address] ← Wt[15:0]
Example
STRH w3, [x1, #16]
Encoding
Binary Layout
01
111
0
01
00
imm12
Rn
Rt
Operands
-
Wt
Transfer 32-bit integer register (load/store) -
Xn
First source / base 64-bit integer register -
pimm
Positive immediate offset
Reference (Arm A64 ISA)
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0x78000400 | STRH <Wt>, [<Xn|SP>], #<simm> | A64 | 01 | 111 | 0 | 00 | 00 | 0 | imm9 | 01 | Rn | Rt | ||
| 0x78000C00 | STRH <Wt>, [<Xn|SP>, #<simm>]! | A64 | 01 | 111 | 0 | 00 | 00 | 0 | imm9 | 11 | Rn | Rt | ||
| 0x79000000 | STRH <Wt>, [<Xn|SP>{, #<pimm>}] | A64 | 01 | 111 | 0 | 01 | 00 | imm12 | Rn | Rt | ||
| 0x78200800 | STRH <Wt>, [<Xn|SP>, (<Wm>|<Xm>){, <extend> {<amount>}}] | A64 | 01 | 111 | 0 | 00 | 00 | 1 | Rm | option | S | 10 | Rn | Rt |
Description
Store Register Halfword (immediate) stores the least significant halfword of a 32-bit register to memory. The address that is used for the store is calculated from a base register and an immediate offset. For information about memory accesses, see Load/Store addressing modes.
Operation
bits(64) address;
bits(16) data;
boolean privileged = PSTATE.EL != EL0;
AccessDescriptor accdesc = CreateAccDescGPR(MemOp_STORE, FALSE, privileged, tagchecked);
if n == 31 then
CheckSPAlignment();
address = SP[];
else
address = X[n, 64];
if !postindex then
address = GenerateAddress(address, offset, accdesc);
if rt_unknown then
data = bits(16) UNKNOWN;
else
data = X[t, 16];
Mem[address, 2, accdesc] = data;
if wback then
if postindex then
address = GenerateAddress(address, offset, accdesc);
if n == 31 then
SP[] = address;
else
X[n, 64] = address;