ldrsw

Load Register Signed Word (Immediate)

LDRSW <Xt>, [<Xn|SP>, #<pimm>]

Loads a word and sign-extends it to 64-bits.

Details

Loads a signed word from memory using immediate offset and sign-extends it to 64 bits. No condition flags are affected. This is an AArch64 Base instruction that executes in all privilege levels.

Pseudocode Operation

address ← Xn + (pimm << 2);
Xt ← SignExtend(Mem[address, 4], 64);

Example

LDRSW x3, [x1, #16]

Encoding

Binary Layout
10
111
0
01
10
imm12
Rn
Rt
 
Format Load/Store
Opcode 0xB9800000
Extension Base

Operands

  • Xt
    Transfer 64-bit integer register (load/store)
  • Xn
    First source / base 64-bit integer register
  • pimm
    Positive immediate offset

Reference (Arm A64 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0xB8800400 LDRSW <Xt>, [<Xn|SP>], #<simm> A64 10 | 111 | 0 | 00 | 10 | 0 | imm9 | 01 | Rn | Rt
0xB8800C00 LDRSW <Xt>, [<Xn|SP>, #<simm>]! A64 10 | 111 | 0 | 00 | 10 | 0 | imm9 | 11 | Rn | Rt
0xB9800000 LDRSW <Xt>, [<Xn|SP>{, #<pimm>}] A64 10 | 111 | 0 | 01 | 10 | imm12 | Rn | Rt
0x98000000 LDRSW <Xt>, <label> A64 10 | 011 | 0 | 00 | imm19 | Rt
0xB8A00800 LDRSW <Xt>, [<Xn|SP>, (<Wm>|<Xm>){, <extend> {<amount>}}] A64 10 | 111 | 0 | 00 | 10 | 1 | Rm | option | S | 10 | Rn | Rt

Description

Load Register Signed Word (immediate) loads a word from memory, sign-extends it to 64 bits, and writes the result to a register. The address that is used for the load is calculated from a base register and an immediate offset. For information about memory accesses, see Load/Store addressing modes.

Operation

bits(64) address;
bits(32) data;

boolean privileged = PSTATE.EL != EL0;
AccessDescriptor accdesc = CreateAccDescGPR(MemOp_LOAD, FALSE, privileged, tagchecked);

if n == 31 then
    CheckSPAlignment();
    address = SP[];
else
    address = X[n, 64];

if !postindex then
    address = GenerateAddress(address, offset, accdesc);

data = Mem[address, 4, accdesc];
X[t, 64] = SignExtend(data, 64);
if wback then
    if wb_unknown then
        address = bits(64) UNKNOWN;
    elsif postindex then
        address = GenerateAddress(address, offset, accdesc);
    if n == 31 then
        SP[] = address;
    else
        X[n, 64] = address;