ubfx

Unsigned Bit Field Extract (A32)

UBFX<c> <Rd>, <Rn>, #<lsb>, #<width>

Extracts bits from a register and zero-extends them.

Pseudocode Operation

extracted ← Rn<(lsb + width - 1):lsb>; Rd ← ZeroExtend(extracted, width);

Example

UBFX r0, r1, #0, #width

Encoding

Binary Layout

cond

31:28

01111

27:23

1

22

1

21

widthm1

20:16

Rd

15:12

lsb

11:7

101

6:4

Rn

3:0

 

Format Data Proc

Opcode 0x07E00050

Extension A32 (Base)

Operands

• Rd
  Destination general-purpose register
• Rn
  First source / base general-purpose register
• lsb
  Start Bit
• width
  Width

Related

Other forms of ubfx

• ubfx Unsigned Bit Field Extract (Thumb)

More in A32 (Base)

Reference

View in Arm A64 ISA Reference ↗ Arm AArch32 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0x07E00050	UBFX{<c>}{<q>} <Rd>, <Rn>, #<lsb>, #<width>		A32		cond | 01111 | 1 | 1 | widthm1 | Rd | lsb | 101 | Rn
0xF3C00000	UBFX{<c>}{<q>} <Rd>, <Rn>, #<lsb>, #<width>		T32		11110 | 0 | 11 | 11 | 0 | 0 | Rn | 0 | imm3 | Rd | imm2 | 0 | widthm1

Description

Unsigned Bit Field Extract extracts any number of adjacent bits at any position from a register, zero-extends them to 32 bits, and writes the result to the destination register.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();
    R[d] = ZeroExtend(R[n]<msbit:lsbit>, 32);