ldnf1w
SVE Load Non-Fault Contiguous Words
LDNF1W { <Zt>.S }, <Pg>/Z, [<Xn|SP>]
Loads words without faulting.
Details
The SVE Load Non-Fault Contiguous Words instruction loads words without faulting.
Pseudocode Operation
// Loads words without faulting
Example
LDNF1W p0/m/Z, [x1]
Encoding
Binary Layout
10100100
10
101000
Pg
Rn
Zt
Operands
-
Zt
Transfer scalable vector register (SVE load/store) -
Pg
Predicate -
Xn
First source / base 64-bit integer register