bfm

Bitfield Move (64-bit)

BFM <Xd>, <Xn>, #<immr>, #<imms>

Moves a bitfield from source to destination (64-bit).

Details

Bitfield move that extracts a bitfield from Xn and inserts it into Xd at a rotated position. The bitfield width is determined by imms, and rotation by immr controls where bits are placed. NZCV flags are not affected. This is an AArch64-only instruction.

Pseudocode Operation

width ← 64
bfwidth ← (imms - immr) mod width + 1
if immr <= imms then
  wmask ← ((1 << bfwidth) - 1) << immr
  tmask ← ((1 << bfwidth) - 1)
  Xd ← (Xd AND NOT wmask) OR ((Xn << immr) AND wmask)
else
  wmask ← ((1 << bfwidth) - 1) >> (width - immr)
  tmask ← ((1 << bfwidth) - 1) << (width - immr)
  Xd ← (Xd AND NOT wmask) OR (((Xn >> (imms + 1)) OR (Xn << (width - imms - 1))) AND wmask)

Example

BFM x0, x1, #immr, #imms

Encoding

Binary Layout
1
01
100110
1
immr
imms
Rn
Rd
 
Format Bitfield
Opcode 0xB3400000
Extension Base

Operands

  • Xd
    Destination 64-bit integer register
  • Xn
    First source / base 64-bit integer register
  • immr
    Rotate
  • imms
    Size

Reference (Arm A64 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x33000000 BFM <Wd>, <Wn>, #<immr>, #<imms> A64 0 | 01 | 100110 | 0 | immr | imms | Rn | Rd
0xB3400000 BFM <Xd>, <Xn>, #<immr>, #<imms> A64 1 | 01 | 100110 | 1 | immr | imms | Rn | Rd

Description

Bitfield Move is usually accessed via one of its aliases, which are always preferred for disassembly. If <imms> is greater than or equal to <immr>, this copies a bitfield of (<imms>-<immr>+1) bits starting from bit position <immr> in the source register to the least significant bits of the destination register. If <imms> is less than <immr>, this copies a bitfield of (<imms>+1) bits from the least significant bits of the source register to bit position (regsize-<immr>) of the destination register, where regsize is the destination register size of 32 or 64 bits. In both cases the other bits of the destination register remain unchanged.

Operation

bits(datasize) dst = X[d, datasize];
bits(datasize) src = X[n, datasize];

// perform bitfield move on low bits
bits(datasize) bot = (dst AND NOT(wmask)) OR (ROR(src, r) AND wmask);


// combine extension bits and result bits
X[d, datasize] = (dst AND NOT(tmask)) OR (bot AND tmask);