sel

SVE Select Elements

SEL <Zd>.<T>, <Pg>, <Zn>.<T>, <Zm>.<T>

Selects elements from Zn or Zm based on predicate.

Pseudocode Operation

for i = 0 to VL/esize-1
  if Pg[i] then
    Zd[i] ← Zn[i]
  else
    Zd[i] ← Zm[i]

Example

SEL z0.s.T, p0/m, z1.s.T, z2.s.T

Encoding

Binary Layout

00000101

31:24

size

23:22

20:16

15:14

13:10

9:5

4:0

Format SVE Select

Opcode 0x0520C000

Extension SVE

Operands

Zd
Destination scalable vector register (SVE)
Pg
Selector
Zn
True Src
Zm
False Src

Other forms of sel

sel Select Bytes

Reference

View in Arm A64 ISA Reference ↗ Arm A64 ISA

Instruction Forms

Encoding	Instruction	ISA	Bit pattern
0xC1208000	SEL { <Zd1>.<T>-<Zd2>.<T> }, <PNg>, { <Zn1>.<T>-<Zn2>.<T> }, { <Zm1>.<T>-<Zm2>.<T> }	A64	11000001 \| size \| 1 \| Zm \| 0100 \| PNg \| Zn \| 0 \| Zd \| 0
0xC1218000	SEL { <Zd1>.<T>-<Zd4>.<T> }, <PNg>, { <Zn1>.<T>-<Zn4>.<T> }, { <Zm1>.<T>-<Zm4>.<T> }	A64	11000001 \| size \| 1 \| Zm \| 01100 \| PNg \| Zn \| 00 \| Zd \| 00
0x25004210	SEL <Pd>.B, <Pg>, <Pn>.B, <Pm>.B	A64	00100101 \| 0 \| 0 \| 00 \| Pm \| 01 \| Pg \| 1 \| Pn \| 1 \| Pd
0x0520C000	SEL <Zd>.<T>, <Pv>, <Zn>.<T>, <Zm>.<T>	A64	00000101 \| size \| 1 \| Zm \| 11 \| Pv \| Zn \| Zd

Description

Select elements from the first source vector where the corresponding vector select predicate element is true, and from the second source vector where the predicate element is false, placing them in the corresponding elements of the destination vector.

Operation

CheckSVEEnabled();
constant integer VL = CurrentVL;
constant integer PL = VL DIV 8;
constant integer elements = VL DIV esize;
bits(PL) mask = P[v, PL];
bits(VL) operand1 = if AnyActiveElement(mask, esize) then Z[n, VL] else Zeros(VL);
bits(VL) operand2 = if AnyActiveElement(NOT(mask), esize) then Z[m, VL] else Zeros(VL);
bits(VL) result;

for e = 0 to elements-1
    if ActivePredicateElement(mask, e, esize) then
        Elem[result, e, esize] = Elem[operand1, e, esize];
    else
        Elem[result, e, esize] = Elem[operand2, e, esize];

Z[d, VL] = result;

sel