setffr
SETFFR
Set First-Fault Register.
Pseudocode Operation
No pseudocode available.
Encoding
Binary Layout
00
31:30
100101
29:24
0
23
0
22
10
21:20
1100100100
19:10
000000
9:4
0
3
0
2
00
1:0
Related
More in SVE
Reference
View in Arm A64 ISA Reference ↗
Arm A64 ISA
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0x252C9000 | SETFFR | A64 | 00 | 100101 | 0 | 0 | 10 | 1100100100 | 000000 | 0 | 0 | 00 |
Description
Initialise the first-fault register (FFR) to all true prior to a sequence of first-fault or non-fault loads. This instruction is unpredicated. This instruction is illegal when executed in Streaming SVE mode, unless FEAT_SME_FA64 is implemented and enabled.
Operation
CheckNonStreamingSVEEnabled(); constant integer VL = CurrentVL; constant integer PL = VL DIV 8; FFR[PL] = Ones(PL);