rsubhnt

SVE Rounding Subtract Narrow (Top)

RSUBHNT <Zd>.<T>, <Zn>.<Tb>, <Zm>.<Tb>

Subtracts, rounds, and narrows (Top half).

Pseudocode Operation

No pseudocode available.

Encoding

Binary Layout
01000101
31:24
size
23:22
1
21
Zm
20:16
011
15:13
1
12
1
11
1
10
Zn
9:5
Zd
4:0
 
Format SVE2 Narrowing
Opcode 0x45207C00
Extension SVE2

Operands

  • Zd
    Dest
  • Zn
    Src1
  • Zm
    Src2

Related

More in SVE2

Reference

View in Arm A64 ISA Reference ↗ Arm A64 ISA

Instruction Forms

Encoding Instruction ISA Bit pattern
0x45207C00 RSUBHNT <Zd>.<T>, <Zn>.<Tb>, <Zm>.<Tb> A64 01000101 | size | 1 | Zm | 011 | 1 | 1 | 1 | Zn | Zd

Description

Subtract each vector element of the second source vector from the corresponding vector element in the first source vector, and place the most significant rounded half of the result in the odd-numbered half-width destination elements, leaving the even-numbered elements unchanged. This instruction is unpredicated.

Operation

CheckSVEEnabled();
constant integer VL = CurrentVL;
constant integer elements = VL DIV esize;
bits(VL) operand1 = Z[n, VL];
bits(VL) operand2 = Z[m, VL];
bits(VL) result = Z[d, VL];
constant integer halfesize = esize DIV 2;

for e = 0 to elements-1
    integer element1 = UInt(Elem[operand1, e, esize]);
    integer element2 = UInt(Elem[operand2, e, esize]);
    integer res = ((element1 - element2) + (1 << (halfesize - 1))) >> halfesize;
    Elem[result, 2*e + 1, halfesize] = res<halfesize-1:0>;

Z[d, VL] = result;