ptest
SVE Predicate Test
PTEST <Pg>, <Pn>.B
Updates processor flags (NZCV) based on predicate state.
Details
Tests the predicate Pn.B (byte-wide elements) under the control of governing predicate Pg and updates the condition flags (N, Z, C, V) to indicate the result. Sets Z=1 if all tested elements are false, C=1 if any tested element is true, N and V are set according to the logical AND and OR of tested bits. This is an AArch64-only SVE instruction.
Pseudocode Operation
result_any ← 0
result_all ← 1
for i = 0 to VL/8-1
if Pg[i] == 1 then
if Pn[i] == 1 then
result_any ← 1
result_all ← result_all AND 1
else
result_all ← 0
endif
endif
endfor
Z ← (result_any == 0)
C ← result_any
N ← result_all
V ← 0
Example
PTEST p0/m, p1.B
Encoding
Binary Layout
00
100101
0
1
01
000011
Pg
0
Pn
0
0
0
0
0
Operands
-
Pg
Mask -
Pn
First source predicate register (SVE)
Reference (Arm A64 ISA)
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0x2550C000 | PTEST <Pg>, <Pn>.B | A64 | 00 | 100101 | 0 | 1 | 01 | 000011 | Pg | 0 | Pn | 0 | 0 | 0 | 0 | 0 |
Description
Sets the First (N), None (Z), !Last (C) condition flags based on the predicate source register, and the V flag to zero.
Operation
CheckSVEEnabled(); constant integer VL = CurrentVL; constant integer PL = VL DIV 8; bits(PL) mask = P[g, PL]; bits(PL) result = P[n, PL]; PSTATE.<N,Z,C,V> = PredTest(mask, result, esize);