ptest

SVE Predicate Test

PTEST <Pg>, <Pn>.B

Updates processor flags (NZCV) based on predicate state.

Pseudocode Operation

result_any ← 0
result_all ← 1
for i = 0 to VL/8-1
  if Pg[i] == 1 then
    if Pn[i] == 1 then
      result_any ← 1
      result_all ← result_all AND 1
    else
      result_all ← 0
    endif
  endif
endfor
Z ← (result_any == 0)
C ← result_any
N ← result_all
V ← 0

Example

PTEST p0/m, p1.B

Encoding

Binary Layout

00

31:30

100101

29:24

0

23

1

22

01

21:20

000011

19:14

Pg

13:10

0

9

Pn

8:5

0

4

0

3

0

2

0

1

0

0

 

Format SVE Predicate

Opcode 0x2550C000

Extension SVE

Operands

• Pg
  Mask
• Pn
  First source predicate register (SVE)

Related

More in SVE

Reference

View in Arm A64 ISA Reference ↗ Arm A64 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0x2550C000	PTEST <Pg>, <Pn>.B		A64		00 | 100101 | 0 | 1 | 01 | 000011 | Pg | 0 | Pn | 0 | 0 | 0 | 0 | 0

Description

Sets the First (N), None (Z), !Last (C) condition flags based on the predicate source register, and the V flag to zero.

Operation

CheckSVEEnabled();
constant integer VL = CurrentVL;
constant integer PL = VL DIV 8;
bits(PL) mask = P[g, PL];
bits(PL) result = P[n, PL];

PSTATE.<N,Z,C,V> = PredTest(mask, result, esize);