uhadd8

Unsigned Halving Add 8

UHADD8<c> <Rd>, <Rn>, <Rm>

Unsigned average of 4 bytes.

Details

Performs unsigned halving addition of four 8-bit bytes in parallel, effectively computing the average. Each byte of Rn is added to the corresponding byte of Rm and the result is divided by 2 (rounded down). No condition flags are affected.

Pseudocode Operation

for i = 0 to 3 do
  byte_rn ← Rn[8*i+7:8*i]; byte_rm ← Rm[8*i+7:8*i]
  sum ← byte_rn + byte_rm
  Rd[8*i+7:8*i] ← sum >> 1

Example

UHADD8 r0, r1, r2

Encoding

Binary Layout
cond
01100
111
Rn
Rd
1
1
1
1
1
00
1
Rm
 
Format SIMD Integer
Opcode 0x06700F90
Extension A32 (DSP)

Operands

  • Rd
    Destination general-purpose register
  • Rn
    First source / base general-purpose register
  • Rm
    Second source / offset general-purpose register

Reference (Arm AArch32 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x06700F90 UHADD8{<c>}{<q>} {<Rd>,} <Rn>, <Rm> A32 cond | 01100 | 111 | Rn | Rd | 1 | 1 | 1 | 1 | 1 | 00 | 1 | Rm
0xFA80F060 UHADD8{<c>}{<q>} {<Rd>,} <Rn>, <Rm> T32 111110101 | 000 | Rn | 1111 | Rd | 0 | 1 | 1 | 0 | Rm

Description

Unsigned Halving Add 8 performs four unsigned 8-bit integer additions, halves the results, and writes the results to the destination register.

Operation

if ConditionPassed() then
    EncodingSpecificOperations();
    sum1 = UInt(R[n]<7:0>) + UInt(R[m]<7:0>);
    sum2 = UInt(R[n]<15:8>) + UInt(R[m]<15:8>);
    sum3 = UInt(R[n]<23:16>) + UInt(R[m]<23:16>);
    sum4 = UInt(R[n]<31:24>) + UInt(R[m]<31:24>);
    R[d]<7:0>   = sum1<8:1>;
    R[d]<15:8>  = sum2<8:1>;
    R[d]<23:16> = sum3<8:1>;
    R[d]<31:24> = sum4<8:1>;