rfe
Return From Exception
RFE<c> <Rn>{!}
Loads PC and CPSR from the stack.
Details
Restores the Program Counter and CPSR from a pair of words stored on the stack indicated by Rn. If write-back is enabled, Rn is updated to point past the loaded values. This instruction is used to return from exceptions and perform mode changes. Requires privileged execution. A32-only system instruction; the PC is restored and CPSR is updated, potentially changing processor mode and interrupt masks.
Pseudocode Operation
if (P == 0) then address ← Rn
else address ← Rn - 8
if (U == 1) then
new_pc ← [address]
new_cpsr ← [address + 4]
if (W == 1) then Rn ← Rn + 8
else
new_pc ← [address]
new_cpsr ← [address + 4]
if (W == 1) then Rn ← Rn - 8
PC ← new_pc
CPSR ← new_cpsr
Example
RFE r1!
Encoding
Binary Layout
1111100
0
0
0
W
1
Rn
00001010000
00000
Operands
-
Rn
First source / base general-purpose register
Reference (Arm AArch32 ISA)
Instruction Forms
| Encoding | Instruction | ISA | Bit pattern | ||
|---|---|---|---|---|---|
| 0xF8100A00 | RFEDA{<c>}{<q>} <Rn>{!} | A32 | 1111100 | 0 | 0 | 0 | W | 1 | Rn | 00001010000 | 00000 | ||
| 0xF9100A00 | RFEDB{<c>}{<q>} <Rn>{!} | A32 | 1111100 | 1 | 0 | 0 | W | 1 | Rn | 00001010000 | 00000 | ||
| 0xF8900A00 | RFE{IA}{<c>}{<q>} <Rn>{!} | A32 | 1111100 | 0 | 1 | 0 | W | 1 | Rn | 00001010000 | 00000 | ||
| 0xF9900A00 | RFEIB{<c>}{<q>} <Rn>{!} | A32 | 1111100 | 1 | 1 | 0 | W | 1 | Rn | 00001010000 | 00000 | ||
| 0xE810C000 | RFEDB{<c>}{<q>} <Rn>{!} | T32 | 1110100 | 00 | 0 | W | 1 | Rn | 1 | 1 | 00000000000000 | ||
| 0xE990C000 | RFE{IA}{<c>}{<q>} <Rn>{!} | T32 | 1110100 | 11 | 0 | W | 1 | Rn | 1 | 1 | 00000000000000 |
Description
Return From Exception loads two consecutive memory locations using an address in a base register:
An address adjusted by the size of the data loaded can optionally be written back to the base register.
The PE checks the value of the word loaded from the higher address for an illegal return event. See Illegal return events from AArch32 state.
RFE is undefined in Hyp mode and constrained unpredictable in User mode.
Operation
if ConditionPassed() then
EncodingSpecificOperations();
if PSTATE.EL == EL2 then
UNDEFINED;
elsif PSTATE.EL == EL0 then
UNPREDICTABLE; // UNDEFINED or NOP
else
address = if increment then R[n] else R[n]-8;
if wordhigher then address = address+4;
new_pc_value = MemA[address,4];
spsr = MemA[address+4,4];
if wback then R[n] = if increment then R[n]+8 else R[n]-8;
AArch32.ExceptionReturn(new_pc_value, spsr);