dsb

Data Synchronization Barrier

DSB <option>

Ensures completion of memory accesses.

Details

Data Synchronization Barrier ensures that all memory accesses prior to the barrier are observed before any subsequent memory accesses. It acts as a full system memory barrier, blocking speculative memory accesses. Condition flags (N, Z, C, V) are unaffected. This is an AArch64 instruction requiring any privilege level; it serializes the instruction stream and all load/store operations.

Pseudocode Operation

Barrier(Barrier_All)

Example

DSB option

Encoding

Binary Layout

11010101000000110011

CRm

11111

Format System

Opcode 0xD503309F

Extension Base

Operands

option
Barrier type

Reference (Arm A64 ISA)

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0xD503309F	DSB (<option>\|#<imm>)		A64		11010101000000110011 \| CRm \| 1 \| 00 \| 11111
0xD503323F	DSB <option>nXS		A64		11010101000000110011 \| imm2 \| 10 \| 001 \| 11111

Description

Data Synchronization Barrier is a memory barrier that ensures the completion of memory accesses, see Data Synchronization Barrier.

Operation

case alias of
    when DSBAlias_SSBB
        SpeculativeStoreBypassBarrierToVA();
    when DSBAlias_PSSBB
        SpeculativeStoreBypassBarrierToPA();
    when DSBAlias_DSB
        if IsFeatureImplemented(FEAT_TME) && TSTATE.depth > 0 then
            FailTransaction(TMFailure_ERR, FALSE);
        if !nXS && IsFeatureImplemented(FEAT_XS) then
            nXS = PSTATE.EL IN {EL0, EL1} && IsHCRXEL2Enabled() && HCRX_EL2.FnXS == '1';
        DataSynchronizationBarrier(domain, types, nXS);
    otherwise
        Unreachable();