dsb

Data Synchronization Barrier

DSB <option>

Ensures completion of memory accesses.

Pseudocode Operation

Barrier(Barrier_All)

Example

DSB option

Encoding

Binary Layout

11010101000000110011

31:12

CRm

11:8

6:5

11111

4:0

Format System

Opcode 0xD503309F

Extension Base

Operands

option
Barrier type

Other forms of dsb

dsb Data Synchronization Barrier (Thumb)
dsb Data Synchronization Barrier (A32)

Across architectures

Memory Barrier / Fence : how x86, ARM, RISC-V, and PowerISA each do this.

Reference

View in Arm A64 ISA Reference ↗ Arm A64 ISA

Instruction Forms

Encoding	Instruction		ISA		Bit pattern
0xD503309F	DSB (<option>\|#<imm>)		A64		11010101000000110011 \| CRm \| 1 \| 00 \| 11111
0xD503323F	DSB <option>nXS		A64		11010101000000110011 \| imm2 \| 10 \| 001 \| 11111

Description

Data Synchronization Barrier is a memory barrier that ensures the completion of memory accesses, see Data Synchronization Barrier.

Operation

case alias of
    when DSBAlias_SSBB
        SpeculativeStoreBypassBarrierToVA();
    when DSBAlias_PSSBB
        SpeculativeStoreBypassBarrierToPA();
    when DSBAlias_DSB
        if IsFeatureImplemented(FEAT_TME) && TSTATE.depth > 0 then
            FailTransaction(TMFailure_ERR, FALSE);
        if !nXS && IsFeatureImplemented(FEAT_XS) then
            nXS = PSTATE.EL IN {EL0, EL1} && IsHCRXEL2Enabled() && HCRX_EL2.FnXS == '1';
        DataSynchronizationBarrier(domain, types, nXS);
    otherwise
        Unreachable();

dsb