extr

Extract

EXTR <Wd>, <Wn>, <Wm>, #<lsb>

Extracts a register from a pair of registers.

Details

Extract concatenates two 32-bit registers (high Wn concatenated with low Wm) and extracts a contiguous 32-bit slice starting at bit position lsb. The extracted bits are placed in destination Wd. Condition flags (N, Z, C, V) are unaffected. This instruction has no implicit side effects beyond the register write.

Pseudocode Operation

temp ← (Wn[31:0] << 32) | Wm[31:0]
Wd ← temp[(lsb + 31):lsb]

Example

EXTR w0, w1, w2, #0

Encoding

Binary Layout
0
00
100111
0
0
Rm
imms
Rn
Rd
 
Format Data Processing
Opcode 0x13800000
Extension Base

Operands

  • Wd
    Destination 32-bit integer register
  • Wn
    High
  • Wm
    Low
  • lsb
    Least-significant bit position

Reference (Arm A64 ISA)

Instruction Forms

Encoding Instruction ISA Bit pattern
0x13800000 EXTR <Wd>, <Wn>, <Wm>, #<lsb> A64 0 | 00 | 100111 | 0 | 0 | Rm | imms | Rn | Rd
0x93C00000 EXTR <Xd>, <Xn>, <Xm>, #<lsb> A64 1 | 00 | 100111 | 1 | 0 | Rm | imms | Rn | Rd

Description

Extract register extracts a register from a pair of registers.

Operation

bits(datasize) result;
bits(datasize) operand1 = X[n, datasize];
bits(datasize) operand2 = X[m, datasize];
bits(2*datasize) concat = operand1:operand2;

result = concat<(lsb+datasize)-1:lsb>;

X[d, datasize] = result;